1. Field of the Invention
The present invention relates to technology for processing signals belonging to an input signal series.
2. Description of the Related Art
When encoded signals are decoded and when signals are detected, detection and correction of errors due to noise and the like are carried out. A circuit is necessary, of a scale corresponding to computational effort of the error detection and correction. For example, in cases of combinations of a partial response system (referred to below as PR) and low density parity check (LDPC) code, preferable performance can be obtained if iteration decoding is used with decoding thereof. However, in these cases, the circuit scale is enlarged, corresponding to the number of times the decoding is repeated. In order to curtail this enlargement of the circuit scale, technology is known in which a digital aided equalizer (abbreviated to DAE below) is used together with an LDPC decoder. In Patent Document 1, technology is disclosed in which the DAE is used in iteration decoding of a signal that is LDPC encoded, for a read channel in a magnetic disk device.
Patent Document 1: Japanese Patent Application, Laid Open No. 2004-145972
Patent Document 2: Japanese Patent Application, Laid Open No. 2004-164767
However, as described below, a very large amount of computational processing is necessary inside the DAE. The scale of the DAE circuit corresponds to this computational amount, and there is room for improvement in optimizing the circuit scale of the DAE itself.